012026Actively maintained
basalt
The check NVIDIA never shipped
On NVIDIA sm_120 there is no hardware interlock. 21 bits of every instruction tell the GPU how long to wait, and a count one cycle short reads a stale register and returns a wrong answer at full speed, with no crash and no warning. Compilers write those bits; nothing read them back. Pointed at 2,762 kernels NVIDIA ships in CUDA, held out of every table it uses, basalt verifies 10,218,030 dependencies with zero errors.
- Python
- NVIDIA SASS
- sm_120 / Blackwell
- CUDA Driver API
- ptxas / nvdisasm
- ELF / cubin
